International Journal of Research in Arts and Science
ISSN: 2394-9759 | Frequency: 4 Issues/Year
Impact Factor: 0.387 | International Scientific Indexing(ISI) calculate based on International Citation Report(ICR)
Performance Improvement in VLSI Adders
Abstract:
In modern electronics, an adder is a digital circuit that computes the sum of numbers. In many mainframe computers and other processors, adders are used both in the arithmetic logic unit (ALU) and also in various other parts of the computer; they are used to compute addresses, table indices, and various other operations. In VLSI technology, adders have gained a lot of importance. The data processed by numerous digital systems may have delays. Area efficient and power efficient high speed data path logic system designs are one of the important domains of research in VLSI system design. The demand and reputation of portable electronics is motivating the designers to achieve smaller silicon area, longer battery life, higher speeds, and more reliability. Power is one of the important resources a designer tries to save while designing a system. Full adders are fundamental units in various complex circuits, especially in circuits for performing arithmetic operations such as comparators, compressors, parity checkers and so on. Full adders are mainly present in the critical paths of complex arithmetic circuits for multiplication and division. In digital adders, the time required to propagate a carry through the adder limits the speed of addition. The main objective is to minimize the area, delay, power and memory of various types of adders in VLSI System design.
Keywords: VLSI, BCD Adder, ECRL, SPICE.
Volume: 5 | Issue: Holistic Research Perspectives [Volume 4]
Pages: 76-87
Issue Date: August , 2019
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