Bonfring International Journal of Power Systems and Integrated Circuits

Impact Factor: 0.651 | International Scientific Indexing(ISI) calculate based on International Citation Report(ICR)


Implementation of Parallel DA Technique for DWT-IDWT on FPGA for Image Compression

K.B. Sowmya, Dr. Savita Sonoli and M. Nagabushanam


Abstract:

Due to the increasing traffic caused by multimedia information and digitized form of representation of images, image compression become a necessity. The Parallel Distributive Arithmetic (DA) architecture has a reduced latency and a good throughput. This design is twice faster than the simple Distributive Arithmetic Architecture and is thus suitable for applications that require high speed image processing algorithms.

Keywords: Discrete Wavelet Transform (DWT), Distributive Arithmetic (DA), Look-Up Table (LUT), FIR Filter

Volume: 2 | Issue: Special Issue on Communication Technology Interventions for Rural and Social Development

Pages: 143-148

Issue Date: February , 2012

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